Status Word 2

Byte 2 for Axis 1; Byte 66 for Axis 2 of the Response Assembly.

Bit	Definition	Description
0	Reserved
1	Pos HW Limit	This bit indicates the state of the Positive Hardware Limit Input.
2	Neg HW Limit	This bit indicates the state of the Negative Hardware Limit Input.
3	Pos SW Limit	This bit indicates when the position is greater than or equal to the Positive Software Limit Position.
4	Neg SW Limit	This bit indicates when the position is less than or equal to the Negative Software Limit Position.
5-6	Reserved
7	Load Complete	This bit indicates that the command data contained in the Command Message has been successfully loaded into the device. Used for handshaking between the controller and amplifier – see Data Handshake.