CMP
Inputs
IN1 : DINT First value
IN2 : DINT Second value
Outputs
LT : BOOL TRUE if IN1 < IN2
EQ : BOOL TRUE if IN1 = IN2
GT : BOOL TRUE if IN1 > IN2
Remarks
In FFLD language, the rung input (EN) validates the operation. The rung output is the result of "LT" (lower than) comparison).
ST Language
(* MyCmp is declared as an instance of CMP function block *)
MyCMP (IN1, IN2);
bLT := MyCmp.LT;
bEQ := MyCmp.EQ;
bGT := MyCmp.GT;
FBD Language
FFLD Language
(* the comparison is performed only if EN is TRUE *)
IL Language:
(* MyCmp is declared as an instance of CMP function block *)
Op1: CAL MyCmp (IN1, IN2)
LD "Ladder diagram"
Ladder logic is a method of drawing electrical logic schematics. It is now a very popular graphical language for programming Programmable Logic Controllers (PLCs). It was originally invented to describe logic made from relays. The name is based on the observation that programs in this language resemble ladders, with two vertical "rails" and a series of horizontal "rungs" between them MyCmp.LT
ST bLT
LD MyCmp.EQ
ST bEQ
LD MyCmp.GT
ST bGT
See also